SPIE 2026: Key lithography developments & technical takeaways
SPIE Advanced Lithography + Patterning 2026 took place from 23 to 26 February in San Jose, California. The event marked the 50th anniversary of the conference and brought together around 2,500 attendees, 80 exhibitors and more than 300 presentations across six conferences. All major lithography OEMs and suppliers were represented. We attended the event both as a visitor to the technical programme and as an exhibitor with a booth, to follow the technical direction of the field and identify the developments that mattered most.
In this article, we highlight four key developments we observed during the conference, and share the technical takeaways that stood out most.
1. Memory and system-level integration gained ground
Memory performance and system-level integration received clear attention throughout the conference. The trends point to a broader shift in the industry: 3D heterogeneous integration is becoming mainstream. That direction was visible in several presentations covering interposers, hybrid bonding, overlay and distortion control.
2. High NA EUV and Hyper NA moved further into focus EUV lithography was one of the strongest themes at SPIE 2026.
ASML stated that Hyper NA with 0.75 NA is on the roadmap and presented it as a natural next step to improve resolution and extend single exposure patterning. The overall picture from the visited talks is that High NA EUV is moving further into practical application and volume manufacturing.
3. Advanced packaging brought new lithography challenges
Advanced packaging was not treated as a side topic. It appeared repeatedly in presentations from memory companies, equipment suppliers and research institutes. A consistent challenge was warpage of wafers. These topics show that lithography performance is increasingly linked to how well processes support advanced packaging flows and heterogeneous integration.
4. Metrology and AI became more important
Metrology also played a prominent role across the conference. The fair shows that computational lithography is evolving further. Across these talks, AI was presented not as a separate trend but as an increasingly relevant tool in metrology, classification and design optimization.
Main technical takeaways & conclusion
Across the presentations we attended, the same direction became clear: lithography development is no longer driven by one single route. Progress depends on the combined development of exposure technology, packaging, metrology and computational methods.
SPIE 2026 showed an industry moving on several fronts at the same time. High NA EUV continues to progress, while advanced packaging, heterogeneous integration, metrology and AI are becoming more central to manufacturability. Together, these developments point to a field where system-level understanding is becoming increasingly important.
The developments we saw in San Jose underline that the next steps in lithography will not come from one technology alone. They will come from the ability to connect technical choices across the full process, from exposure and patterning to packaging, measurement and integration.
Want to explore this topic further? Read our earlier article on the future of lithography or learn more about our work in the semiconductor market. Or contact us directly via the form below.
